RISC-V Crossed the Line: Open Silicon Is Now Boringly Mainstream

The most convincing sign that RISC-V has won isn't a keynote or a benchmark — it's the yawns. A decade of "the year of RISC-V" hype has quietly collapsed into something far more powerful: the open instruction set is now shipping in tens of billions of units, landing in laptops, showing up in Qualcomm's acquisition plans, and getting standard Linux distributions behind it. When open silicon stops being a movement and starts being a line item in a market forecast, it has crossed the line into mainstream.

The Numbers Crossed Into Absurdity

Start with the market data, because it's the least arguable part of the story. SHD Group's 2026 market forecast projects RISC-V-based SoC shipments reaching roughly 36 billion units by 2031, with associated revenues climbing past $300 billion — up from about 6.9 billion units shipped as recently as last year[1]. That's not a niche architecture on a growth curve; that's the volume profile of a technology that already dominates its segment. Even the market-value framing is striking: analysts put the 2025 RISC-V market at around $2.5 billion, forecast to hit $10.8 billion by 2030 at a compound growth rate near 34 percent, with the memory-chip shortage of 2026 pushing even more buyers toward royalty-free cores to protect margins[2].

The mix matters as much as the totals. The bulk of those units are still microcontrollers and embedded cores — SSD controllers, power-management ICs, earbud silicon — but the AI accelerator segment is forecast to reach 9 billion RISC-V units by 2031 on its own[1]. The open ISA quietly became the control plane of the AI hardware boom, which is the least glamorous and most consequential way it could have won. It's the same pattern Linux ran two decades ago: nobody chose it for the datacenter in one dramatic moment — it ate the boring periphery first, and by the time anyone held a vote, the boring periphery was the whole building.

Qualcomm Bought the Future, Literally

Nothing says "boringly mainstream" like a company that spent years defending its Arm investment suddenly spending money on RISC-V. In December 2025, Qualcomm acquired Ventana Micro Systems, a RISC-V CPU design startup, explicitly to deepen its RISC-V CPU roadmap[3]. The timing is everything: the deal came just months after Qualcomm claimed "complete victory" in its legal dispute with Arm — the fight that made every SoC vendor on Earth reread their Arm contract twice[4]. This is the leverage effect in action. When you can't fully trust your incumbent supplier's licensing mood, you buy an exit option. Qualcomm didn't buy Ventana to abandon Arm; they bought it so they never have to fear that conversation again.

Tenstorrent, meanwhile, is openly selling RISC-V CPU IP for AI computation as its core product line — the chip company Jim Keller built isn't using RISC-V as a side project, it's using it as the foundation of every accelerator it ships[5]. When the AI-hardware startups of 2026 want to build custom compute, the default answer for the "small core that drives the big matrix" problem is RISC-V, because nobody wants to negotiate a license fee on the boring part of the chip.

Laptops and Operating Systems Caught Up

The consumer-facing milestone finally arrived too. IEEE Spectrum's report on RISC-V laptops noted that DeepComputing's DC-ROMA machines — with Framework announcing a RISC-V mainboard option — pushed RISC-V portables from demo curiosity into something you could actually buy in 2025[6]. These are still early-adopter machines, and nobody is pretending they beat a MacBook Air. But the hardware pipeline exists, which is more than the skeptic camp could say three years ago.

The software side matters even more, and this is where Canonical's year-end retrospective is telling: starting with Ubuntu 25.10, RVA23 — the modern RISC-V profile ratified in 2024 — became the minimum supported baseline for Ubuntu on the architecture[7]. That's the unglamorous work that actually mainstreams an ISA: a top-tier distro declaring a common feature baseline so software written for one RISC-V chip runs on all of them. Canonical explicitly framed the goal as a "stable, predictable, production-grade Linux platform" that silicon vendors, OEMs, and ODMs can build on with confidence — and it kept the door open for older RVA20 boards like the StarFive VisionFive 2 and Milk-V Mars CM while the ecosystem converges on the new floor. Fragmentation was always the knock on RISC-V; profile-based convergence is the answer, and it's happening in production, not in slides.

The Geopolitics Are Now a Feature and a Bug

Here's the twist that keeps this story from being a simple victory lap. RISC-V's momentum in China — where it's become the politically favored ISA for domestic silicon — is exactly what makes Washington nervous, and CSIS's analysis argues plainly that the United States cannot disengage from RISC-V without ceding standards leadership, since American firms remain deeply embedded in the ecosystem[8]. Recurring legislative rumblings about restricting US companies' participation in the standard haven't stuck — largely because, as Qualcomm's own acquisition shows, RISC-V is no longer a foreign threat to American chip firms. It's their hedge too.

Still, be honest about the gaps. The best RISC-V application cores still trail Apple's and Arm's top designs by a generation or two on single-thread performance. Ecosystem maturity — debugging tools, enterprise support, long-tail drivers — favors Arm everywhere risk-averse procurement is involved. And the shipment numbers flatter the architecture: billions of those units are control cores that will never run your software. Counting cores shipped is the ISA equivalent of counting Linux installs on routers. It's a real number, but it's a different claim than "RISC-V is ready for your next workstation," and anyone selling you the second claim using the first number is doing the marketing version of benchmark cherry-picking.

The geopolitical layer deserves its own paragraph of honesty, too. Export-control politics could still fragment the ecosystem from the other direction — if US firms were ever barred from contributing to the standard, you'd get two RISC-Vs: an international one and a Chinese one, with the profile guarantee that makes software portable quietly dissolving between them. Nothing in current policy has gone that far, and CSIS's argument is precisely that disengagement would cost America more than it gained[8]. But it's the risk to watch, because it's the one scenario where the boring-mainstream story actually reverses.

What I Think

I think the "will RISC-V win?" question was always malformed. Instruction sets don't win; they persist. What RISC-V has actually done by 2026 is delete Arm's pricing power at the design-table level. Every new chip project now starts with a credible royalty-free alternative on the whiteboard, and you can price what that's worth by watching Arm's licensing posture soften and Qualcomm's acquisitions. A 36-billion-unit forecast isn't a prediction — it's a recording of decisions already made.

My three-year call: RISC-V laptops cross from developer curiosity into Chromebook-tier respectability as the RVA23 software base matures, the AI accelerator control-plane dominance deepens until RISC-V cores are as unremarkable as Cortex-M0s, and the interesting question shifts from the ISA to the next layer — open GPU IP, open interconnects, and whether the open-hardware playbook can repeat what RISC-V just proved: that the boring, standard-compliant, royalty-free option eventually eats the meeting. That's not a revolution anymore. It's just Tuesday.